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improving, and that’s your own self.”

– Aldous Huxley

The following questions were included
in the NEET 2018 question paper. These are of the usual type and are simple.

(1) In the circuit shown in the
figure, the input voltage Vi is 20 V, V

_{BE}= 0 and V_{CE}= 0. The values of I_{B}, I_{C}and β are given by
(1)
I

_{B}= 20 μA, I_{C}= 5 mA, β = 250
(2)
I

_{B}= 25 μA, I_{C}= 5 mA, β = 200
(3)
I

_{B}= 40 μA, I_{C }= 10 mA, β = 250
(4)
I

_{B}= 40 μA, I_{C}= 5 mA, β = 125
Since the
emitter to base voltage of the transistor is zero, the entire input voltage 20
volt appears across the 500 kΩ base resistor. The base current is therefore
given by

I

_{B}= 20 V/500 kΩ = (20/500) mA =0.04 mA = 40 μA
Since
the emitter to collector voltage is zero, the entire 20 volt supply appears
across the 4 kΩ collector resistor. The
collector current is therefore given by

I

_{C}= 20 V/4 kΩ = 5 mA
The
current gain is given by

β = I

_{C}/ I_{B}= (5 mA)/(40 μA) = (5×10^{–3})/(40×10^{–6}) = 125
So option
(4) is the answer/

(2)
In the combination of the following gates the output Y can be written in terms
of inputs A and B as

The AND
gate at the top has inputs A and B̅. Therefore
its output is A • B̅. The bottom AND
gate has inputs A̅ and B so that its output is A̅ • B.

Since the outputs of
the NAND gates are applied to the two inputs of the OR gate, the final output
(from the OR gate) is A • B̅ + A̅ • B as given in option (2).

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